The International Symposium on Asynchronous Circuits and Systems (ASYNC) is the premier forum for researchers and Industry to present their latest insights and results in asynchronous VLSI computing. Asynchronous computations are at the heart of recent deep learning and neuromorphic designs and well-suited for distributed tasks in high-performance low-energy processing and communication.

The 28th IEEE International Symposium on Asynchronous Circuits and Systems (IEEE ASYNC 2023) will be held during July 16-19, 2023 in Beijing, China, which is organized by Tsinghua University, China.

Authors are invited to submit papers on any aspect of asynchronous design, ranging from design, synthesis, and test to asynchronous applications.

Paper Deadlines

Topics of interest include:

Asynchronous pipelines, architectures, CPUs, and memories;

Asynchronous ultra-low power systems, energy harvesting, and mixed-signal/analogue;

Asynchrony in emerging technologies, including bio, neural, nano, and quantum computing; 

CAD tools for asynchronous design, synthesis, analysis, and optimization;

Formal methods for verification and performance/power analysis;

Test, security, fault tolerance, and radiation hard design;

Asynchronous variability-tolerant design, resilient design, and design for manufacturing;

Asynchronous design for neural networks and machine learning applications;

Circuit designs, case studies, comparisons, and applications;

Mixed-timed circuits, clock domain crossing, GALS systems, Network-on-Chip, and multi-chip interconnects;

Hardware implementations of asynchronous models and algorithms, asynchronous techniques in clocked designs, and elastic and latency-tolerant synchronous design;

Circuit designs, case studies, comparisons, and applications.

Click to know how to sumbit a paper to ASYNC 2023.